Calibration and Thermal Characterization of Multi-Chip SiC Power Modules: Challenges and Approaches

In many applications, compact design is highly favored but poses a significant challenge. This extends to semiconductor systems, aiming to reduce the size of power modules for both volume reduction and increased power density. However, compact sizing for power semiconductors leads to heightened power loss density and reduced heat dissipation capacity toward the cooling surface. Inadequate cooling measures, especially with reduced size, can result in escalated component temperatures. This work focuses on analyzing methods to dissipate losses from semiconductors and monitoring feasible temperature rises. The study specifically delves into the thermal properties of a power module. It is based on the NTC resistor R
NTC
mounted in the housing to estimate junction temperature, discusses pros and cons of employing the NTC resistor R
NTC
, conducts detailed R
DS
(on) measurements under various conditions and performs calibration of the voltage drop across the body diode for estimating junction temperature. The aim is to gain deeper insights into the thermal performance of the SiC multi-chip power module in a practical situation, involving a thermal simulation validated with practical results.