Performance and Evaluation of CG-CS LNA over Gain and Noise Optimization

This paper explores the design and performance evaluation of a dual-stage low noise amplifier (LNA) employing a common gate-common source (CG-CS) architecture. The proposed LNA design capitalizes on the strengths of both common gate and common source configurations to enhance key performance parameters, including gain, noise figure, and Power consumption. By introducing a π-matching network attains improved amplification and minimize noise figure within the constructed CG-CS LNA. The proposed CG-CS (LNA) is simulated in Cadence virtuoso using 45nm technology. The obtained simulation results of the proposed LNA provides a peak gain of 35.38 dB and NF of 4.56 dB from 1 to 2 GHz. The LNA consumes an average power of 4.98 mW from 1.2V supply.