Design and Implementation of Perceptron-Based Branch Predictor

As the demand for computer performance continues to increase in society, along with the escalating requirements of complex software for high-performance hardware, the efficiency of processor instruction execution also needs to be continuously improved. However, the existing TAGE_SC_L predictor suffers from reduced prediction accuracy when dealing with branches exhibiting significant noise. To address this issue, we propose a perceptron-based branch predictor aimed at enhancing the recognition efficiency of relevant branches, thereby improving prediction accuracy and further enhancing processor execution efficiency. We conducted a series of experiments using SPEC CPU 2006 as a benchmark, and the results showed that our predictor improved prediction accuracy, reduced pipeline stalls, and effectively enhanced processor execution efficiency compared to state-of-the-art branch predictors with complex branch prediction accuracy as the baseline.