Fully boosted 64K dynamic RAM with automatic and self-refresh

A novel high-speed low-power 64K dynamic RAM with enough margin has been attained using a double polysilicon and 3-/spl mu/m process technologies. To obtain a low soft error rate below 1/spl times/10/SUP -6/ errors per device hour without sacrificing the high-speed and low-power operation, some novel approaches are proposed in the circuit and device designs. In particular, fully boosted circuits and the Hi-C cell structure with polysilicon bit line are designed to increase the margin of the single 5-V power supply 64K dynamic RAM. The fabricated device provides a typical access time of 90 ns and an operating power of 190 mW at 25/spl deg/C. Also, the design features of the automatic and self-refresh functions on the same chip are described.