A New Exact Reversible Full Adder for High Speed Arithmetic Applications

In this paper, we present a new exact reversible full adder has a ‘quantum cost’ (QC) of 9 with total delay of 7Δ. The proposed adder herein referred to as "Exact Reversible Full Adder" (ERFA). The proposed ERFA is designed using 4-Feynman gates and 1-Fredkin gate in three different stages. The proposed ERFA has ‘2’ ancillary inputs (AIs) and ‘3’ garbage outputs (GOs). Further, to verify the functionality, the proposed ERFA is designed and validated through Verilog HDL code simulation. Also, it is compared in terms of various design metrics (DMs) against 16 reversible full adders that were reported in the current literature.