Optimization of Tungsten Plug Thin Film Process to Improve the Fill Seam and Contact Resistance in 180nm CMOS Technology

In this manuscript, an experimental study to optimize the tungsten (W) deposition process was carried out to address the poor fill seam issue and to improve the contact resistance in CMOS 180nm technology. A modified tungsten deposition recipe was introduced in both contact and via modules, wherein; three-step process was adopted in place of two steps. Tungsten nucleation and fill process parameters were optimized to attain better seam and step coverage. In modified recipe, an improvement of 17.4% and 16% was measured in step coverage and contact resistance respectively.