Influence and Algorithmic Suppression of Parasitic Capacitance of the R-C-NR Layer Contacts in Thick-Film Fractional-Order Capacitor

The realization of capacitive fractional-order circuit elements based on distributed layer R-C-NR (resistive, capacitive, resistive) structures is analyzed for implementation in thick-film technology. The metal contacts for layer connections are found to introduce parasitic capacitance which is modeled in this work treating the contacts as lumped-element capacitors. A design method for the algorithmic suppression of the parasitic capacitance is presented. The design method uses a genetic algorithm to optimize the interconnections and parameters of the R-C-NR structures that comprise the circuit to counteract the effects of the parasitic capacitance. Using modified nodal analysis, the impact of the parasitic capacitance on the admittance characteristics is simulated and suppressed by the algorithm. Simulations validate this method, with best performance for fractional orders between 0 and 0.5, where it is possible to design circuits with a frequency range of constant admittance phase of 2.5 to 4 decades with a maximum admittance phase deviation of 2 degrees.