Acceleration Object Detection using FPGA platform based on Improved CNN

Deep neural networks have emerged as a leading approach for object detection in recent years. However, their intensive computational requirements often make them unsuitable for embedded systems. The TinyYolo network is a widely-used deep neural network is designed to be simpler and smaller compared to its counterparts. Yet, it still presents challenges in FPGA implementations due to its large number of nodes. In this research, we focus on adapting the TinyYolo network for FPGA implementation. Our modified network comprises four deep neural sub-networks. One serves as the input, two as intermediate networks that extract both local and global features and the final one aggregates the extracted features. Based on these aggregated features, the target objects are detected. Our adaptation offers several advantages including Hardware-based implementation leading to increased computing power, Significant power savings compared to software implementations and Optimal parallel processing, power efficiency and memory usage making it suitable for embedded applications across various domains Our network implemented on the ZU3EG A484 chip achieved a processing speed of 58 FPS and consumed 4.105 W making it competitive with similar systems.