Effect of dimension and defects on the flexibility of ultra-thin chips for wearable electronics

Flexible packages had already been extensively investigated for use in wearable electronics, for example, chip on flex(COF) packages using anisotropic conductive film as the interconnection materials. But it is difficult to achieve highly flexible COF packages due to the brittle nature of silicon chips used in them. There are a lot of factors that could affect the flexibility of the brittle silicon chip, thickness, dimension and defects which were produced by the thinning process of silicon chip. In this paper, in order to achieve more flexible packages, the silicon chip properties were studied. The thickness of silicon chip was fixed with 50μm using DBG process. There were 3 types of potential crack initiation at silicon chips: dicing saw marks, edge chipping and surface defects. 3 kinds of silicon dimension were used 16mm x 16mm, 16mm x 8mm and 16mm x 1.5mm respectively. The flexibility was determined by bending radius which evaluated by four point bending method. At the same time, the main factor affecting the flexibility of silicon chip was also defined, then physical surface treatment and chemical etching were used to improve the defect and examination.It was found that the bending radius was the same as a theoretical value in terms of dimension by the simulation result of finite element analysis(FEA), because the silicon chip was with the same modulus, but it was different from the experiment result that the bending radius became smaller from 8mm(16mm x 16mm) to 5mm(16mm x 1.5mm), because the larger dimension with bigger bending area had more grinding saw marks confirmed by AFM, and grinding saw marks were the main factor affected the flexibility analyzed by the four point bending method. And depending on the degree of variation in bending radius of a silicon chip, in relation to its dimensions, it could be concluded that the chips with smaller bending area from square shape to rectangular shape exhibit fewer surface defect and greater flexibility. To conduct a thorough analysis of surface defects in silicon chip flexibility, the widely used Sopori etch method was employed, which utilizes a chemical etch to create etch pits at the locations where surface emergence occurs. The number of defects was analyzed based on different etch time and surface condition, and the bending radius of the etched Si chip with different number of surface defects was then confirmed. As a result, the rectangular chips with fewer defects were found to be less likely to affect flexibility and are recommended as the future wearable device packages.