A Review of Program disturb of 3D NAND Flash Memory

As a non-volatile memory, NAND flash exists widely in mobile devices, USB, SD cards, consumer electronics, computer systems and other applications. With the development of electronic information technology, the demand for high-density memory for massive storage data is increasing. NAND flash memory is an indispensable member of the flash family because of its excellent characteristics such as large capacity, fast write and erase speed, high durability and low cost per bit. The development of NAND flash memory technology is inseparable to the advanced manufacturing technology. In the past decade, 2D NAND flash has gradually entered the physical bottleneck. In order to further reduce the unit bit storage cost without increasing the original lithography technology requirements, NAND flash memory has transitioned from planar to three-dimensional stacked structures, which further improves the storage density per unit area. However, the 3D NAND architecture has brought about an increase in programming disturb patterns compared to 2D, resulting in a wider threshold distribution and greater bit error probability. This paper demonstrates the development history, technical principles, and storage architecture of NAND flash, then the origin of program disturbs and the current mainstream solutions were highlighted.