A Comprehensive Study on the Fabrication of a Three-Dimensional SiC Trench MOSFET with N-P-N Sandwich Epitaxial Layers

In this study, we have designed and fabricated a three-dimensional SiC trench MOSFET with N-P-N sandwich epitaxial layers. This is the first time on record that N-P-N sandwich epitaxial layers are used in a SiC trench MOSFET. The cell structures include section-A and section-B, where section-A is to ensure that the P-shield region remains grounded in three-dimensional space. The section-B can conduct current and is the main cell structure. Further simulation shows that the breakdown voltage of the section-B cell structure is 1675V, and the corresponding termination structure is 1780V. In addition, in order to generate the N-enrich region with better performance, ion implantation conditions are continuously optimized during the fabrication process. The SEM images of the SiC trench MOSFET during optimization are demonstrated in detail. More importantly, a termination structure is fabricated in the N-P-N sandwich epitaxial layers for the first time, and the electric field of the P+ buried layer can be modulated by N-type ion implantation to achieve a relatively high breakdown voltage. The wafer and SEM images of the fabricated structure are shown, and the breakdown voltage of the fabricated device reaches 1130 V at I
ds
=1 mA. The N-enrich region formed by N-type ion implantation in the P-type epitaxial layer is tested to conduct current. Subsequently, the process and parameter design will be continuously optimized to improve the device characteristics.