Implementation of an improved parallel code phase search algorithm for GPS signal acquisition on Zynq SoC

In the field of Global Positioning System (GPS), signal acquisition stands as the initial and crucial step in the signal processing chain. Numerous algorithms have been proposed for acquisition, and this paper introduces enhancements to the Parallel Code-phase Search (PCS) algorithm utilized for acquiring GPS satellite signals. Our approach involves the generation of carrier replica and PRN code, as well as the calculation of the FFT conjugate of the PRN code using MATLAB, with subsequent storage in an SD-Card. A key improvement lies in utilizing a single FFT IPCore for both FFT and IFFT computations, eliminating the need for two FFT IPCores and one IFFT IPCore as seen in the original PCS algorithm. This optimization results in reduced consumption of DSP blocks and memory resources. Furthermore, we compared different architectures, namely Radix-4, Radix-2, and Radix-2lite, in terms of clock cycles, resource utilization, and power consumption. The Radix-4 architecture was chosen due to its efficiency. This enhancement not only lowers power consumption by at least 8.8% but also increases the algorithm execution time while reducing overall costs.