Extraction of Drain Current Variability Components in Junctionless Nanowire Transistors

This work investigates the applicability of a recent drain current mismatch model developed for inversion mode FDSOI transistors to junctionless nanowire transistors. The model shows good agreement to experimental data with different widths and channel lengths. The results show that series resistance component of drain current mismatch is the main source of variability for wider devices at strong inversion region. In contrast, the current gain factor has shown to be the main component for narrower devices. Comparison of modeled results with other electrical parameters extraction methods shows that they may overestimate or underestimate variability components of the drain current.