An Analysis of Fault Diagnosis Approaches in Memristor Crossbar Array

The use of memristors has been explored for various applications due to its unique computing capability, in particular in-memory computing (IMC). IMC offers both storage and computation using the same hardware, which overcomes to a large extent the CPU-memory bottleneck that exists in current-day computing architectures. Memristors are often fabricated in a crossbar, which offers various benefits over other memory technologies, including in-memory computing, low power, and high density. However, the still immature nano-scale fabrication technology can lead to a number of faulty cells in the crossbar (typically, 30–40% faulty cells). For some applications like neuromorphic computing, a limited number of faults can be tolerated. However, for some other applications like Boolean function realization, a single faulty cell may lead to incorrect results. We therefore need a fault diagnosis approach to use the memristor devices efficiently. In this paper, we have analyzed various fault diagnosis approaches available in the literature. We observe that most of the existing approaches employ March-based test, which is used for conventional RAM. Nevertheless, memristor storage and operation techniques differ from conventional memory, necessitating a different approach and fault models to be used.