The Drain Bias Modulation Effect of Random Telegraph Noise in Gate-All-Around FETs for Cryogenic Applications

In this letter, the random telegraph noise (RTN) in 25-nm-physical-channel-length gate-all-around field effect transistors (GAA FETs) are thoroughly investigated. Electrical characterizations at cryogenic condition (10 K) indicate that the drain bias (
${V}_{{\textit {DS}}}$
), which has little impact on the RTN in long-channel transistors, can strongly affect that in ultra-scaled devices. An increase of 0.15 V in
${V}_{{\textit {DS}}}$
led to a
$\sim 10\times $
enlargement of the statistical high-state time constant (
$\tau _{c}$
) together with a ~20x reduction of the statistical low-state time constant (
$\tau _{e}$
), which could be attributed to the more pronounced drain fringing field in short-channel devices. More significantly, because the drain fringing field counteracts the gate electric field, the
$\Delta ~{V}_{{\textit {DS}}}$
-induced
$\tau _{c}$
and
$\tau _{e}$
variation trends are contrary to those caused by the gate bias. An analytical model, which captures the non-uniform electric field profile in short-channel devices, has been developed for quantitative RTN analysis. Single-level traps close to the channel/drain junction are found to be the major contributor to the RTN, providing guidance for future process optimization.