Implementation of Floating Point CORDIC Algorithm Using 45 nm Technology For COS SINE Generation

This paper focuses on creating a 32-bit floating-point mathematical co-processor core that utilizes the CORDIC algorithm. The primary objective of this design is to enable the calculation of sine and cosine values for 32-bit floating-point numbers through the CORDIC algorithm. This co-processor design adheres to the IEEE-754 standard for single-precision floating-point numbers. These trigonometric functions are implemented using essential arithmetic operations such as addition, subtraction, multiplication, along with various other elementary functions. Verilog code has been developed to model the co-processor core.