Research on 3D Integrated Circuit Layout Planning Model Based on Genetic Algorithm

It is of great significance to vigorously develop the integrated circuit industry and study the design and manufacturing technology of integrated circuits, which will strongly promote the rapid growth of China’s information industry and greatly promote the healthy growth of the national economy. With the continuous improvement of integration, traditional two-dimensional integrated circuits are facing challenges from many sides, such as the limitation of size reduction, chip power consumption, online interconnection and so on. Compared with the traditional two-dimensional circuit, the three-dimensional circuit has a special structure, and its layout design needs a new algorithm. In this article, an analytical strategy of heat transfer in three-dimensional integrated circuits based on genetic algorithm (GA) is proposed to build a layout planning model of three-dimensional integrated circuits. The simulation results show that the error of the algorithm is small and the accuracy is excellent, which can reach more than 95%. As the core technology of three-dimensional integrated circuit, through silicon vias (TSV) can realize the electrical connection between stacked devices, thus shortening the interconnection length, reducing the delay and power consumption, reducing the chip occupation area, and realizing high integration and heterogeneous chip integration. The related results are helpful to the optimal design of TSV.