Ternary Multiply-Accumulate Circuit Based on Domino Structure

In order to solve the problem of memory and computation bottleneck in neural networks and improve the efficiency of computation, this paper proposes a design scheme of ternary multiply-accumulate circuits based on domino structure. This paper first analyzes the principles of ternary logic and multiply-accumulate circuits, then introduces the design scheme of domino ternary literal arithmetic circuits, multiply circuits, and accumulate circuits, and finally realizes the ternary multiply-accumulate arithmetic by combining the above circuits. The scheme is tested under Taiwan Semiconductor Manufacturing Company(TSMC) 65nm process, and the results verify the accuracy of the arithmetic results. The two-bit multiply four-bit accumulate circuit operates at the supply voltage of 1.2V, the temperature of 27°C, and the clock frequency of 50MHz, and the average power dissipation of the circuit is measured to be 75.5uW, and the maximum delay of the circuit is 385ps.