Design of a Low Temperature Drift High Power Supply Rejection Bandgap Reference Circuit

This paper presents the design of a bandgap reference circuit with high power supply ripple rejection (PSRR) and low temperature coefficient. Instead of using an operational amplifier, this circuit employs a self-biased cascode structure as the core bandgap reference circuit. The sub-threshold current exponential characteristics of MOS transistors are utilized to achieve high-order curvature compensation for both high and low temperatures, significantly improving the voltage reference accuracy. Furthermore, pre-regulation techniques and low-pass filters are employed to suppress power supply ripple in the low frequency range and high frequency range, respectively, resulting in a significant improvement in the power supply rejection ratio of the output voltage. The designed circuit is simulated using 180nm CMOS process model. Under a 3.3V power supply voltage, the output voltage is approximately 1.252 V, with a temperature coefficient of 1.826 ppm/°C, and a PSRR of 120.6dB @ DC, 81.7 dB @ 10kHz, and 79.3 dB @ 10MHz.