GPU Accelerated Harmonic-Balance Small Signal Analysis

Harmonic-balance (HB) small signal analysis is an important feature in RF circuit simulation. In this paper, we evaluate computational bottlenecks of HB small signal analysis on a CPU platform, especially for post-layout circuits at advanced process nodes. We then present an algorithm in dealing with HB small signal analysis on a graph processing unit. We developed a method that fully exploit the coherent parallelism of frequency sweeping, such that simulation efficiency is significantly improved. Our results show that the computational efficiency has increased by an order of magnitude on the graph processing unit comparing with that on the CPU platform.