A 6.9-17.0 GHz Low-noise Amplifier in 65nm CMOS

Due to the ever-increasing data transmission rate, the wideband LNAs are being required popularly. A wideband LNA operating at 6.9-17.0 GHz with two cascode amplification stages is proposed. Source inductance degeneration and Chebyshev filter matching are used to achieve low noise and wideband input matching simultaneously. The
$\Pi- \text{type}$
inter-stage matching circuit is implemented to satisfy bandwidth requirements. Fabricated in 65nm CMOS, the amplifier finally obtained a gain of 19.7 dB and a minimum noise figure of 3.9 dB with good return loss and unconditional stability.