A Power-Efficient $\boldsymbol{4}-\mathbf{V}_{\mathbf{ppd}}$ 128-Gb/s PAM-4 Optical Modulator Driver with Merged BV Doubler Topology in 130-nm BiCMOS

This paper presents a power-efficient optical modulator driver circuit designed in 130-nm BiCMOS technology. The proposed driver circuit, based on the breakdown voltage (BV) doubler topology, achieves a significant reduction in power consumption and chip area by merging the data-path emitter-follower (EF) stage and the bias common-emitter (CE) stage into one single stage. The effectiveness of the proposed driver is confirmed by theoretical analysis and simulations. Compared with conventional BV doubler-based topology, the proposed driver improves the power consumption by 21% from 1.11W to 0.92W, with a -3-dB bandwidth of 49.0 GHz and an output voltage swing of 4
$\mathbf{V}_{\mathbf{ppd}}$
. Simulation results also demonstrate that the proposed driver is capable of supporting PAM-4 optical communications at a data rate of 128 Gb/s, with an output PAM-4 eye width of 0.61 UI and a ratio of level mismatch (RLM) of 95%.