Analysis of Panel Warping for multilayer RDL Process and Extraction of Dielectric Properties of Photosensitive Polyimide on Fan-out Panel Level Packaging

The major issue of currently popular technology called as fan-out panel level packaging (FOPLP) is panel warpage in processing due to coefficient thermal expansion (CTE) mismatch. The redistribution line (RDL) first process always suffers from this issue which results in lithography defocus and interconnection failures. In this study, RDL-first process with photosensitive polyimide (PSPI) dielectric film are step-by-step simulated to illustrate the reasons of panel warpage. Additionally, the design of RDL is strongly correlated with the dielectric properties at high frequency operation because the dielectric constant (Dk) and dissipation factor (Df) significantly affect the circuit operating frequency and energy loss. The wafer adjusted layer (WAL) using Si
3
N
4
film effectively reduce corner warpage from 1.2 mm to 0.67 mm. Moreover, the T-shape of symmetric resonant with PSPI dielectric film and Cu line was measured by VNA for S
21
parameter at 10 GHz to predict Dk/Df without complicate measurement.