Understanding Design Rules of Fan-in WLCSP Concerning Thermo-Mechanical Challenges

Wafer Level Chip Scale Packaging (WLCSP) is a type of chip packaging technology that allows for the integration of multiple semiconductor devices on a single wafer. This is achieved by using a wafer-level process to package the chips directly onto the wafer surface, eliminating the need for a separate package. It offers several advantages over traditional packaging methods, such as smaller size; improved thermal performance; lower cost and higher density. As a result, it is becoming increasingly popular in the semiconductor industry. While WLCSP solution offers numerous benefits, it also presents some challenges in terms of mechanical reliability. The absence of a separate package in WLCSP makes the chips more vulnerable to physical damage, such as cracking or chipping, during handling or assembly. The solder joints used to connect the chip to the external components can create stress concentration points on the chip, which can lead to die cracking or other types of damage. Package level qualification tests for the assessment of component reliability may cause delamination and cracking of the die active layer as well as re-passivation, which is essential of the WLCSP process for re-routing. These cracks could expose the die to the environment, which can lead to corrosion and other long term reliability issues in its field service. This paper addresses such problems as re-passivation and die active layer cracking in a systematical way and comes up with a general guideline of design rules aiming at enhancing its integrity during the package level qualification. The impact of geometry and process related variables is evaluated using the general-purpose finite element code ANSYSY Mechanical in terms of relevant stress components. It is found that simulation results are in good agreement with failure analysis observations regarding the cracking initiation and propagation. Detailed numerical studies and discussions are presented about the re-passivation termination structures, die corner configurations, space between the openings of the first and second re-passivation layer as well as re-passivation thickness and its curing process.