CMOS Design of a Memristor Emulator: Model, Simulation and Results

This paper presents a memristor emulator constructed with active building blocks and a model based on port equations. The proposed memristor emulator employs analog current-mode building blocks such as the current follower (CF), an operational transconductance amplifier (OTA), and a passive element. The circuit and model exhibit the characteristics inherent to a memristor. The memristor emulator can be configured as either decremental or incremental and demonstrates satisfactory performance up to frequencies of 20 MHz. To validate the functionality of the proposed circuit, simulations were performed using Cadence software and TSMC’s 180 nm technology. The simulations were conducted under typical operating conditions with a supply voltage of ±1.2 V.