A Reduced Switch Count Multilevel Inverter with Asymmetrical Sources

A nine-level asymmetrical inverter network topology with lesser quantity of switches and de sources is proposed in this work. This topology is developed from the combination of H-bridge and flying capacitor inverter structures. This topology has four dc sources, two dc sources are connected in inverse path w.r.t the other two. The proposed topology produces four positive and four negative voltage levels at the output, providing a voltage waveform at the load ports with nine discrete levels. The switches in the inverter are controlled using efficient sinusoidal PWM technique. In this manuscript, modulation technique and operating concept are broken down in depth. Also included are comprehensive displays of simulation outcomes for a range of modulation indices. The zero, positive, and negative states of the proposed inverter are analyzed. The last step is a simulation run in MATLAB/Simulink.