Rectification for Computed Tomography Scans of Printed Circuit Boards Using Vias as Landmarks

In this paper, we present a novel approach to rectify and correct distortions in computed tomography (CT) scans of printed circuit boards (PCBs). Our method combines eigendecomposition, via detection, and a RANSAC-optimized rigid mapping to achieve accurate rectification. By leveraging vias as reliable landmarks, we mitigate distortions arising from non-ideal scanning conditions. Quantitative and empirical analyses on a corpus of 9 CT scans demonstrate improvements to in-plane design visibility, whereby design area improves by an average of 12.33% during initial rectification, and another 6.22% after using vias to produce a fine tuned rigid alignment, leading to a total visibility improvement of 18.55%. Our integrated approach reduces labor-intensive tasks, enhances efficiency, and improves accuracy in PCB analysis using CT imagery. The methodology has broader implications for reverse engineering and design optimization. Future work should expand the sample size and incorporate direct ground truth measurements for further validation. Our proposed approach offers a practical solution to rectify and correct distortions in PCB CT scans, improving the efficiency and reliability of analysis processes.