Design and Analysis of an Irregular-Shaped Power Distribution Network (PDN) for High Bandwidth Memory (HBM) Interposer

In this paper, we design and analyze the irregular-shaped power distribution network (PDN) for high bandwidth memory (HBM) interposer, taking into account practical application considerations. HBM is a promising solution to meet the high performance memory requirements of artificial intelligence (AI) applications, offering exceptional bandwidth with vast number of input/outputs (I/Os). The extensive I/Os switching operations can generate significant power noise, challenging power integrity with conventional uniform PDN designs. Therefore, a realistic and accurate design and analysis of the HBM interposer PDN, which accounts for irregularities in the PDN shape, becomes critical to ensure power integrity. Previous works focused on uniform PDN designs of the HBM interposer without considering these irregularities. We design the PDN of the HBM3 interposer based on practical considerations like ballmap from JEDEC and the routability of memory channels. We then model and analyze the PDN, including the power/ground through silicon via (P/G TSV), in the 10 MHz to 30 GHz frequency domain. The results show that we can effectively analyze the precise effects of the PDN by considering the irregular-shape of the PDN in real applications.