Logic-in-Memory Approach Realizing Memristor-Based Multiplexers

Instead of the von Neumann architecture, logic-in-memory (LIM) provides a revolutionary approach to promoting computing efficiency. Based on the earlier work of complete LIM 16 Boolean logics, this article describes a memristor-based multiplexer (MUX) efficiently realized using a voltage/resistor-input-resistor-output (V/R-R) logic method, despite the fact that MUX is one of complicated logics in the design of VLSI circuits. Following that, a unique 2–1 MUX is further created by merging destructive resistor-input-resistor-output (R-R) logic with V/R-R logic, resulting in further device reduction. The 2–1 MUX only requires 3–4 memristors and four steps. Furthermore, the technique can be implemented for a 4–1 MUX using seven memristors and ten steps. Tests and simulations validated their feasibility and correctness. The effect of resistor due to the flip voltage variation on the computation accuracy is further analyzed, and the cascaded serial scheme of the MUX is finally presented.