Design a Low Phase Noise Voltage Control Oscillator with Split-Length Approach

Recently, the need for voltage control ring oscillators (VCO) is directed towards the improvement of phase noise and power consumption. The split-length approach has been deployed in the proposed VCO in order to reduce phase noise. This paper presents a comparison between the conventional VCO design and the proposed split-length VCO design. According to this comparison an improvement is achieved in two criteria, which are power consumption and phase noise. The two designs are deployed in differential topology for three stages. The conventional VCO design achieves a power consumption of 5.4 mWatt and phase noise −81 dBc/Hz @ 1MHz. While the proposed VCO design achieves better power consumption of 3.3 mwatt and better phase noise −103 dBc/Hz @ 1MHz than the conventional design. The circuit is implemented using 65nm CMOS process technology.