A Compact High-Isolation V-Band Millimeter Wave Wilkinson Power Divider Design in 65-nm CMOS Process

Slim on-chip transmission lines of a quasi-rectangular coaxial structure are used to construct a 2-way Wilkinson power divider for millimeter-wave integrated circuits (ICs) in the V-band. With the ground-shielding metal layers surrounding the central core, a meandered design is adopted for the two quarter-wavelength transmission line segments and makes the power divider very compact. It also provides very high signal isolation from neighbouring devices and the resistive semiconductor substrate. In a 65-nm CMOS process, the power divider design occupies a chip area of only 285 × 67 μm
²
(≈ 0.019 mm
²
). A low power loss and a very high isolation between the output ports are maintained in a frequency range from 50 to 75 GHz, achieving |S
21
| = -3.95 dB (with the 3 dB power division loss included), |S
23
| = -29 dB and |S
11
| = -29.5 dB, all at 60 GHz.