High-Speed Peak Detection Circuit for On-Chip EMI Test

In the electromagnetic interference (EMI) test, the disturbance amplitude is a key parameter to be measured. It is difficult to measure the peak voltage of the disturbance on the integrated circuit (IC) because the chip is encapsulated inside a package. Existing peak detection circuits have relative long response time and thereby cannot detect high-frequency disturbance. To solve that problem, this article proposes a high-speed detection method to measure the peak voltage of the periodic electromagnetic disturbance inside the chip. The circuit contains a synchronizer to align the sampling time to the peak time. A dynamic comparator is employed to compare the actual voltage of the disturbance peak with its “guessed” value. The comparison result switches capacitors in a capacitor digital-to-analog convertor (CDAC) and let its output voltage gradually approaches the disturbance peak voltage. The proposed peak detector is implemented using TSMC 0.18 µm CMOS process. It has a small area of 0.737 mm
²
, The post-layout simulation show that the detector can accurately measure the peak voltage of the disturbance signals with amplitudes ranging from 0.1 V to 0.8 V and frequencies up to 1.1GHz. For all process corner conditions, the measured voltage is difference from the actual value for less than 1%. The detector has the advantages of high detection accuracy, width frequency range, and small area occupation. The work presented in this article provide a new solution for the circuit design in the on-chip EMI Test.