Indefinite Impedance Matrix Techniques for Power Integrity Analysis of Multilayered Printed Circuits

A method based on the indefinite impedance matrix application to planar circuits is developed for power delivery network (PDN) characterization of high-speed/high-density data communication circuits. By utilizing the parallel plate waveguide concept, the proposed method incorporates both ground and power via effects as well as decoupling capacitors with indefinitely many conductor layers stacked in an arbitrary order in a multilayered printed circuit board. The incorporation of analytical expressions for resonant planar circuits allows for parameterized PDN characterization and provides a significant computational advantage for a follow-up PDN optimization. The method is tested on some proof-of-concept cases and the results are observed in good agreement with those obtained from a numerical electromagnetic simulator.