FPGA Implementation and Validation of Particle Swarm Optimization suited for varied applications

Particle Swarm Optimization (PSO) is a metaheuristic algorithm that iteratively optimizes a problem to get the optimal solution. In the field of electrical and electronic engineering, it has numerous applications. This optimization technique is largely used in software. However, hardware implementation of PSO results in high performance. In this paper, the three-variable sphere function is the problem that is being optimized. PSO is implemented on FPGA by developing Verilog HDL code. Digilent Basys3 Xilinx board is used to implement PSO in hardware and display the results. The binary output is shown on the basys3 board using LEDs, and it is then converted to decimal numbers using a binary-to-decimal number converter. The entire Verilog HDL code contains 3 modules and six 16 bit binary outputs. The basys3 board’s LEDs are used to display these 16 bit binary outputs. Then two 16 bit numbers are merged to form a 32 bit number and it is converted into a decimal number using a binary-to-decimal converter. The values obtained from the MATLAB implementation of PSO are used to verify the final outputs of the hardware implementation. Also, the results obtained from the hardware implementation are converging and are accurate with the results obtained from MATLAB. Finally, an application is implemented where PSO is used to estimate the equivalent circuit parameters for the induction motor.