Implementation of FPGA-based Portable Count Down Clock (PCDC)

Count Down Time (CDT) is critical, particularly in the case of flight vehicle tests, viz. missiles, rockets, artillery, uncrewed aircraft, etc. The role of CDT is essential for ensuring the completion of all the predetermined events in an orderly manner before launching the flight vehicle, updating the participating stations (tracking sensors) about the expected launch time, and the progress of events as per the countdown document. The fundamental requirement of any flight vehicle test is the flawless generation and dissemination of CDT to all the tracking stations to synchronize all the countdown activities. Generally, the Count Down Clock (CDC) generates and disseminates CDT in IRIG-B (Inter Range Instrumentation Group) format. This paper describes the implementation of an FPGA-based portable CDC, which distributes the CDT in different IRIG formats, e.g., B-000 (unmodulated Time code) and 120 (modulated Time code). The authors also describe an external signal conditioning circuit incorporating DAC (digital to analog converter) and a high-speed differential amplifier for converting TTL to modulated Time code. In addition to this, this article illustrates the dissemination of CDT over TTL, RS232, and Ethernet media. LabVIEW (Laboratory Virtual Instrumentation Engineering Workbench) based RS232 ASCII, and Ethernet client applications are also delineated in this article.