CWAHA: Cluster-Wise Approximation for Hardware implementation of Arithmetic functions

The proposed work adopts clustering method to approximate and segment normalized non-linear functions towards realizing arithmetic units such as divider, square-root, squarer, and inverse-of-squarer. The novel implementation of utilizing K-Means Clustering algorithm towards building an nonlinear partitions ensures the possibility of realizing arithmetic units with differed error characteristics as per the designers demand. In this paper IEEE half precision floating point format (fp16) is used to implement and validate novel arithmetic units. Improvement in accuracy was established for arithmetic unit with higher partitions, and conversely advantage in hardware metrics is achieved with lesser partitions. Maximum silicon footprint saving of 60.97%, and power benefit of 66.70%, were achieved for the proposed approximate divider over state-of-the-art (SOTA) dividers. The proposed square-rooter showed maximum footprint savings of 55.12% when compared with SOTA design. Besides, the proposed arithmetic functions especially dividers and square-rooters showed accelerated performance when compared with the respective SOTA implementations. The proposed cluster-wise approximation for computing designs, were validated for two of the image processing applications including color quantization, and edge detection. A maximum of 38.84% improvement in PSNR was realized using the proposed square-rooter designed sobel edge detection algorithm over its counterpart SOTA designed edge detector.