True Random Number Generator Prototype Implemented in an FPGA

True Random Number Generators (TRNGs) are one popular solution in hardware-based cryptographic systems, aiding in the security and reliability of data exchange. Their operation is based on physical phenomena and these can be used in applications such as key generation or random challenges. Implementing this type of circuits in FPGA allows for fast prototyping and easy integration.In this paper, we propose a prototype of a TRNG system based on Ring Oscillator (RO) structures that is lightweight, using less than 100 LookUp Tables (LUTs), and does not use post-processing modules. When compared to other state-of-the-art architectures, our prototype adds to a basic entropy source a simple module that uses only basic logic elements, resulting in greater jitter accumulation while keeping the overall architecture small. These characteristics also allow for easy modifications on the circuit to be done and make the design suitable for ASIC platform porting.The proposed architecture has been implemented on a Xilinx Zynq-7000 Zybo Z7-20 FPGA and it is able to pass all the National Institute of Standards and Technology (NIST) statistical tests, showing promise in future applications.