Analog/RF Circuit Aging Prediction based on On-Chip Machine Learning

Estimating aging-related parametric degradation and failure of nanoscale analog/RF integrated circuits (ICs) is crucial for assessing circuit reliability in the field of operation and mitigating aging-related failures. Various on-chip sensors have been proposed for collecting circuit operation conditions such as temperature, power supply variation, etc. in real time. Historical circuit operation conditions can be used for training a machine learning model for predicting aging-related parametric degradation in a circuit. Training and prediction of aging degradation models are performed offline using external computational resources in the past. In this paper, we propose implementation of an on-chip machine learning model for predicting aging-related parametric degradation for analog/RF ICs in real time. Experimental results show that the proposed on-chip prediction model can achieve the same prediction accuracy as compared to offline models for predicting aging parametric degradations in analog/RF ICs.