Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices

Reconfigurable Field Effect Transistors (RFETs) combine P-FET and N-FET properties on a single device, enabling the development of new circuit applications. In this paper, we present SPICE simulations of analog building blocks using a Verilog-A Table Model of a new RFET variant, called Back-Bias RFETs (BB-RFETs). The Verilog-A look-up model is extracted from TCAD simulations based on a previously fabricated and measured BB-RFET device on a 22 nm FDSOI platform. The model is verified to mimic the experimentally observed analog circuit behaviours such as frequency doubling and phase shifting from a single transistor setup. In addition, utilizing the reconfiguration between three operational modes, a newly conceived reconfigurable-rectifier is proposed which can be dynamically switched between half-wave rectifier and full-wave rectifier. Both the model and the newly designed circuit building blocks, therefore, aim to inspire circuit designers to utilize this emerging technology for future computing.