Real-Time Deployment of Simplified Volterra Nonlinear Equalizer in High-Speed PON

In cost-sensitive passive optical networks (PON), economical channel equalization is a promising technique. The electronic equalization is realized by a digital signal processing (DSP) chip with an integrated analog-to-digital converter (ADC) commonly implemented at the receiver side. Field programmable gate array (FPGA), one of the major hardware platforms nowadays, can provide prototype verification for chip design due to the programmability and short iteration cycle. In this letter, using the FPGA and a cascaded 30-GSa/s ADC, a real-time 1310nm band-limited intensity modulation and direct detection PON system is constructed. With a powerful Volterra nonlinear equalizer (VNLE) running on FPGA, a 31-dB power budget is achieved at a 30-Gb/s line rate. Meanwhile, by pruning and clustering the weights in VNLE, the power consumption is declined by 71.6%.