Scaling of redistribution layer for Heterogeneous packaging in a panel level

As the proportion of the semiconductor market applied with advanced packages is rapidly expanding, interest in advanced package technology has increased significantly. Among advanced package technologies, wafer level packages(WLPs) were adopted for the first time in the mass production of mobile application processor packages in 2016. Panel level packages(PLPs) were also considered an alternative technology in terms of production capacity improvement. Even though PLP has extra advantages of cost reduction, product area efficiency, flexibility of chip first and chip last process, and production capacity, many players are reluctant to adopt because there are some technical challenges of resolution capability, process uniformity, and warpage control. Nonetheless, improving those challenging properties, Samsung adopted the technology in the mass production of wearable application processor packages in 2018, and then for mobile application processor packages in 2022. Meanwhile, the demand for both low/middle density and high density with sub 2 um RDL products has been increasing in 2.
$xD(x=1,3,5)$
packages for heterogeneous integration. In addition, larger packages will be required as the demand of high performance applications is increased. Thus, implementing technology of fine patterning and stitching with PLP platform is quite an appropriate approach to prepare the demands. In this work, process capability of fine patterning lower than line and space(L/S) widths of 1.5/1.5um, respectively, and feasibility of stitching technology were examined. The limit resolution of L/S is 0.8/0.8um with chemically amplified resists(CAR) and numerical aperture of 0.24 with an i-line stepper. However, depth of focus(DoF) is around 1um that is too small to apply to high volume manufacturing(HVM). Considering patterning process tolerances under the conditions used in this work, L/S of 1.5/1.5um is an appropriate dimension for HVM. To support this expectation, yield of L/S 1.5/1.5um was investigated with a 2.xD product and the yield above 98% in the layer was obtained. In addition, stitching property was investigated with L/S 2/2um pattern and it showed feasible results under several conditions.