Analysis of Phase Frequency Detector & Charge Pump Switching Circuits for Frequency Synthesizer Using CMOS Technology

Current work describes the complete analysis of Phase Frequency Detector (PFD) as well as the Charge Pump (CP) switching circuits that can be used with the Frequency Synthesizer in phase-locked loop (PLL). The design is employed to be enforced for a frequency synthesizer that can be further utilized with digital video streams for hand-held devices. Two-phase frequency detector are projected during this work to show how the dead zone alters the working of the frequency synthesizer. The major advantage of using those two PFD is to succeed in low power consumption and the dead zone that was achieved for the current consumption. This work covers the conventional charge pump with switched current sources to excite UP and down a capacitance load. Finally, the work shows the simulation results of the PFD/CP system in typical scenario and additionally the simulation results ascertain the working of the circuit in nontypical scenario such as completely varied temperature or change in voltage.