A Fast RNS Processor for Moduli Set {2n+1, 2n, 2n-1}

Residue Number System (RNS) can perform subtraction, addition independently with borrow-free and carry-free propagation. To convert binary to residues and residues to binary, forward conversion and reverse conversion are used. In this paper new mod adder structures were proposed for the mod values (2n - 1) and (2n + 1), these mod adders provide outputs for all cases. A new forward converter has been proposed with the help of newly proposed mod adders to reduce the power, delay, and area than existing design. At the end of this paper deals with designing of RNS processor for error detection and correction in communication systems. These designs have been simulated using NC Launch - Encounter tool in Cadence.