Recent Developments and Challenges in Strained Junctionless MOSFETs: A Review

Junctionless (JL) devices represent a new generation technological development. Several studies have been conducted with an emphasis on various JL device topologies with and without incorporating strain. In this paper, an attempt has been done to provide a succinct overview of strained-JL (S-JL) devices. Moreover, a review of modelling techniques has also been provided. The need for JL architecture has also been explored for unstrained devices. To examine the improvement in device performance, simulations have been performed by several research groups. According to the study, ultra-short channel devices are in need of this technology since additional scaling to increase transistor density and device functionality has already approached its maximum limit. The ultra-abrupt junctions need not to be constructed in JL devices. A study on the benefits of strain in JL MOSFETs has also been performed. In such strained devices, improvements in ON current of up to 30-40% have been characterized. Improvements in leakage currents and threshold voltage were also seen in strained devices.