Substrate Noise Evaluation and Reduction of N-MOSFET Using Optimized Silicone-On-Insulator based on Seagull optimization algorithm

Silicone-on-Insulator (SOI) chips contains numerous single-transistor islands that are dielectrically isolated on the silicon substrate. Leakage currents, radiation-induced photocurrents, latch-up effects and other parasitic effects caused by the huge substrate are initially protected from the thin active silicon layer by the vertical isolation. Correspondingly, the SOI eliminates the need for intricate trench or well creation techniques providing inter device separation. VLSI chips are more compact that results extreme simplification and circuit design. Although the SOI-MOSFET is developed to overcome these restrictions, additional problems are also generated such as kink effect in the I-V characteristics. To address the kink effect issue, the ideally selective buried oxide (SELBOX) MOSFET is developed. In this model, the fully depleted SOI-MOSFET is designed based on the n-MOSFET silicone substrate with optimally selected Buried Oxide (BOX) layer using the seagull optimization algorithm based on the capacitance of the material for reducing the substrate leakage current. Then, the gate oxide insulator, the bi-layer high k-dielectric materials such as Al203 and Si3N4 are used. For evaluating the designed model, the noise is manually injected into the MOSFET based on the noise models in TCAD. The drain current characteristic and transfer characteristics of the SOI-MOSFET are experimentally analysed. In this analysis, the noise affected MOSFET produces drain current of 1.4μA for 3v (Vds) and the noise reduced SOI-MOSFET produces 1.78μA for 3v (Vds). Thus, the designed fully depleted SOI-MOSFET model performs better by reducing the substrate noise.