Novel Radiation Hardened DSOT-MRAM Read Peripheral Circuit With Reduced Sensitive Nodes

Conventional memories face several issues such as poor reliability, high static power, and charge sharing caused by radiation effects as a result of process technology downscaling. Spintronic memory is a viable contender for addressing these challenges. However, radiation induced charges can still affect hybrid spintronic/CMOS peripheral circuitry. Particularly, the charge sharing effect is more significant, causing multiple node upsets due to a single event. The number of sensitive nodes is an essential performance metric for evaluating single event multiple node upset (SEMNU). The smaller the number of sensitive nodes, the less is the charge sharing between them, thereby lowering the possibility of SEMNU. This brief proposes a novel highly radiation tolerant with lowest sensitive nodes (HRLS) read circuit for differential spin orbit torque magnetic random access memory (DSOT-MRAM). The obtained results show that the proposed HRLS circuit is extremely resilient to SEUs independent of its polarity. It can tolerate 8.06X, 10.41X, 9.8X, and 3.49X more critical charges compared to the 13T-RH, 11T-RHBD, 11T-HRC, and CMOS cross-coupled transistor radiation hardened circuits, respectively with a penalty of some area overhead. Moreover, the proposed circuit has the lowest number of sensitive nodes resulting in 6X, 6X, 3X, 3X, and 3X improvement in the charge sharing effects compared to the previously reported 13T-RH, 11T-RHBD, 11T-HRC, CMOS cross-coupled transistor, and 13T radiation hardened circuits, respectively. The proposed radiation-hardened DSOT-MRAM has also an improvement in the write energy thanks to the usage of DSOT-MTJ.