Performance analysis of stacked Nano sheet at gate length of 10nm at linear and saturation region

In this study, the vertically stacked Nano-sheet at the gate length of 10nm is considered. The Nano-sheet is vertically stacked and stacked with gate oxide material of SiO2 with HfO2 each of 1nm thickness. Three fins vertically stacked structures were examined for performance and compared same model at lower and higher voltages. The performance comparative parameters are drive currents and short channel effects, trans-conductance (gm), and output conductance device are considered. All simulations are carried out using the platform of professional V-TCAD device simulator.