Investigation of Reverse Recovery Phenomenon for SiC MOSFETs in High-Temperature Applications

This article presents an investigation of the reverse recovery phenomenon for SiC devices in high-temperature applications (from 25 °C to 250 °C). First, the mechanism of reverse recovery and corresponding influencing factors are analyzed. A piecewise equivalent circuit model is proposed to analyze reverse recovery. Second, two mismatch conditions, which may worsen the reverse recovery, are also introduced when antiparallel Schottky barrier diodes are used. It is found that the device layout of power module and dead time control also affect reverse recovery. It is also found that a short enough or long enough dead time can suppress reverse recovery to some extent, whereas a moderate dead time may lead to the most severe reverse recovery in PN-CELL layout. Finally, different methods for reverse recovery suppression are summarized and compared.