Protection Schemes for Plasma Induced Damage from Well-Side Antennas

In this paper, several protection schemes for the plasma-induced damage (PID) from well-side antennas are proposed. The PID protection components made of diodes or ESD-like clamps are used to either balance the potentials between the wells or clamp the gate-to-source voltages of the victim gates. These protection schemes and the way to insert protection components have been verified by a variety of test structures designed in a 0.13µm BCD (Bipolar-CMOS-DMOS) process where NBL (N-type Buried Layer) is used as the isolation well.