Analysis of Performance Parameters and Gate Line Spacing Variation of Vertical Organic Light-Emitting Transistors

Over the last few years, Organic Semiconductor (OSC) materials based electrical (OTFTs, OSITs) and optical (OLEDs) devices have received great attention. It is because of their capability to be used in large-area, low cost and flexible devices. Vertical organic light emitting transistor (VOLET), a blend of OLED and OSIT can be used to obtain fully organic efficient flexible display devices. VOLETs are multifunctional devices as these delivers both electrical and optical functionalities. These exhibit various merits such as lower gate voltage requirement for current and luminescence modulation, high-speed operation and easy fabrication.In this research paper, VOLET performance has been investigated in terms of its electrical as well as optical characteristics through 2-D numerical device simulation by Atlas. In simulated VOLET, α-NPD and Alq
3
has been utilized for hole-transportation and emission, respectively. Besides this, impact of gate line spacing (S
G
) variation is examined by changing it from 0.5 to 1.5µm with a step size of 0.5µm. An increase of 1.24 times in I
on
/ I
off
ratio along with reduction of 2.22 times in threshold voltage is observed with 3 times reduction in S
G
. As a result of reduced S
G
, depletion layer in off state can cover channel region effectively. Thus, current conduction in VOLET can be controlled efficiently with reduced S
G
. However, a large 2.12 times reduction in maximum luminescent power per unit length (P
Lum_max
) is also observed with 3 times reduction in S
G
.